The present invention relates to a semiconductor memory device, and more specifically to a DRAM (Dynamic Random Access Memory).
The DRAM is provided with a write circuit for writing data in a memory cell. Recently, DRAMs with multi-bit construction have been widely used, which are capable of write per bit mode operation. In this type of DRAM, the data writing operation must be controlled in bit units, and a problem arises in that the number of control signals increases and the pattern area becomes larger.